FPGA怎样读外部RAM,该如何处理

FPGA怎样读外部RAM
硬件连接:
单片机的P0,P2,WR,ALE连接FPGA.

单片机发送:
定义--#define SendOrder *((volatile unsigned char xdata *)(0x0709))
例子--SendOrder=0x01;

问题:FPGA怎样读取地址0x0709上的0x01值?
急,最好能给代码~~

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楼主可以参考下：
http://www.eetop.cn/bbs/thread-56069-1-1.html
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路过留脚印
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那你想问的是什么?VHDL的实现?
FPGA里面至少要实现一个地址译码器,至少要实现一个8-BIT的寄存器,当所有的信号(RD/WR)符合一个"CPU写"的时序的时候,如果地址是0x0709,数据(0x01)会被写到寄存器里面去.....
ALE好处理,就是一个锁存器,很简单...
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一个简单的VHDL实现,可以对地址0x0709译码,并写入一个字节
library ieee;
use ieee.std_logic_1164.all;

entity test is
port (
addr: in std_logic_vector(15 downto 0);
data: in integer range 0 to 255;
nwr: in std_logic;
nrd: in std_logic;
ncs: in std_logic);
end entity test;

architecture a1 of test is
signal work_reg: integer range 0 to 255;
signal n_reg_write: std_logic;
begin
n_reg_write <= '0' when (ncs = '0' and addr(15 downto 0) = X"0709" and nwr = '0') else
'1';

process(n_reg_write)
begin

if (n_reg_write'event and n_reg_write = '1') then
work_reg <= data;
end if;

end process;

end architecture a1;