s3c6410_uart初始化及读写

 1 #include "uart.h"
 2 
 3 #define GPACON        (*((volatile unsigned long *)0x7f008000))
 4 
 5 #define ULCON0        (*((volatile unsigned long *)0x7f005000))
 6 #define UCON0        (*((volatile unsigned long *)0x7f005004))
 7 #define UFCON0        (*((volatile unsigned long *)0x7f005008))
 8 #define UMCON0        (*((volatile unsigned long *)0x7f00500c))
 9 #define UTRSTAT0    (*((volatile unsigned long *)0x7f005010))
10 #define UERSTAT0    (*((volatile unsigned long *)0x7f005014))
11 #define UFSTAT0        (*((volatile unsigned long *)0x7f005018))
12 #define UMSTAT0        (*((volatile unsigned long *)0x7f00501c))
13 #define UTXH0        (*((volatile unsigned long *)0x7f005020))
14 #define URXH0        (*((volatile unsigned long *)0x7f005024))
15 #define UBRDIV0        (*((volatile unsigned long *)0x7f005028))
16 #define UDIVSLOT0    (*((volatile unsigned long *)0x7f00502c))
17 #define UINTP0        (*((volatile unsigned long *)0x7f005030))
18 #define UINTSP0        (*((volatile unsigned long *)0x7f005034))
19 #define UINTM0        (*((volatile unsigned long *)0x7f005038))
20 
21 void uart0_init(void)
22 {
23     GPACON &= ~0xff;
24     GPACON |= 0X22;
25     
26     ULCON0 = 0x03; //data frame: 8n1
27     /*
28     clk: pclk
29     tx int type: level
30     rx int type: pulse
31     rx err int enable
32     tx/rx mode: interrupt or polling 
33     */
34     UCON0 = 0x245; 
35     UFCON0 = 0x00; //disable fifo;
36     UMCON0 = 0X00; //disable auto flow control(AFC)
37     /*
38     DIV_VAL = UBRDIV + (num of 1's in UDIVSLOT)/16
39     DIV_VAL = (PCLK/(bps*16))-1 = (66000000/115200)-1=34.8
40     UBRDIV = 34;
41     num of 1's in UDIVSLOT = 13; 
42     */
43     UBRDIV0 = 0x22;
44     UDIVSLOT0 = 0x1fff;
45 }
46 
47 int uart0_getc(void)
48 {
49     while (!(UTRSTAT0 & 0x1));
50     return (URXH0 & 0xff); 
51 }
52 
53 void uart0_putc(const char c)
54 {
55     while (!(UTRSTAT0 & 0x2));
56     UTXH0 = c;
57     if (c == '
')
58     {
59         uart0_putc('
');
60     }
61 }
62 
63 void uart0_puts(const char *s)
64 {
65     while (*s)
66     {
67         uart0_putc(*s++);
68     }
69 }